Prof. Urmi Shah

Prof. Urmi Shah

Ph.D.(pursuing), MTech., B.E

Date of Joining: 4-Aug-2020

Nature of Association: Regular

Area of Interest

VLSI and Embedded Systems, Optimization Techniques, Digital electronics and computer architecture, IOT, Basic Electronics, Digital Circuits and Logic Design, Microcontroller and sensor interfacing (AVR) , Verilog Coding, Graphene and CNT Interconnects, VLSI subsystem with digital design. 

Qualification
Majors Degrees

  • Ph.D. in VLSI and Embedded Systems – Nirma University (2020-Pursuing) 

  • MTech   ICT- DAIICT (2017-2019)

  • B.E.  Electronics Engineering -GTU (2013-2017)      


Online Certified Courses

  • Interfacing with Arduino, University of California, Coursera, May 2021.

  • Introduction and Programming with IOT boards, Pohang University, Coursera, August 2021.

  • Introduction to the Internet of Things and Embedded Systems, University of California, Coursera, August 2021.

  • Introduction to Machine Learning, Duke University, Coursera, April 2021.

  • Machine Learning: Regression, University of Washington, Coursera, May 2021.

  • Internet of Things: Sensing and Actuation from Devices, University of California, Coursera, Nov 2021.

  • IOT Wireless & Cloud computing Emerging Technologies, University of Yonsei, Coursera, September 2020.

  • Machine Learning, Stanford University, Coursera, February 2020.

  • Programming for everybody, University of Michigan, Coursera, August 2020.

Academic

  • Total academic experience is of 5  years.

Graduate Level

  • Digital Electronics,Analog and Digital Communication, Computer Organization and Architecture, Computer Networks, Microprocessor and Microcontroller, VLSI Design, Telecommunication Engineering

Seminars/Workshop Attended

  • NA

Research Papers 

  • Urmi Shah and Usha Mehta, “Assessing Effect of Variability for Nanoscale Futuristic Interconnects” , AVES conference, SVNIT, Dec. 2021. 

  • Urmi Shah and Usha Mehta, “Robust Schmitt Trigger-based Performance Booster Technique for Futuristic On-Chip Graphene Interconnects”, International Journal of Engineering Trends and Technology (IJETT), Mar. 2022. 

  • Urmi Shah and Usha Mehta, “Parametric and Fault Analysis of Next Generation High Speed Interconnects” , IEEE EDKCONN conference, Kolkata, Nov. 2022. 

  • Urmi Shah and Usha Mehta, “Development and Comparative Analysis of Delay Fault Models for Variants of High-Speed CNT Interconnects at Submicron Technology” , IEEE EDAPS conference, Taiwan, Dec. 2022. 

  • T. Pathade, U. Shah, Y. Agrawal, R. Parekh, “Preeminent buffer insertion technique for long advanced on-chip graphene interconnects,” IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), Dec. 2018.

  • T. Pathade, U. Shah, Y. Agrawal, R. Parekh, “Prominent Schmitt trigger based buffer realization for performance enhancement of advanced on-chip global graphene interconnects,” 5th International Conference on Nanoscience and Nanotechnology, ICONN, 2019.

  • GOLD MEDALIST (university topper) at GTU in Bachelor of engineering.